【Device Papers】Performance investigation of junction-less (JL) high-K vertical stack oxide (VSO) Ga₂O₃-FinFET for RF and linear applications

      Researchers from the VIT-AP University have published a dissertation titled "Performance investigation of junction-less (JL) high-K vertical stack oxide (VSO) Ga₂O₃-FinFET for RF and linear applications" in Microsystem Technologies.

Abstract

      This work presents the performance investigation of Ga₂O₃-based nano channel junction less FinFET for high-frequency applications. The gate oxide consists of the vertical stack of high-K oxide material that includes HfO₂, SiO₂, and Al₂O₃. The proposed Junction-Less Vertical Stack Oxide Ga₂O₃-FinFET (JL-VSO-Ga₂O₃-FinFET) device performance is examined by taking different fin widths and different ranges of ambient temperature. The proposed device is effectively influencing the electrical characteristics that make it suitable for RF and linear applications. Semiconductor materials are highly sensitive to temperature conditions, which influences device analog/RF parameters. This paper conducts a comprehensive analysis of Ga₂O₃-based nano channel junction less FinFET device by implementing a dielectric material engineering approach and temperature variations. Furthermore, the device parameters, like drain current (I_d), transconductance (g_m), cut-off frequency (F_T), gate capacitance, and output conductance, are studied by varying the temperature and fin width. The proposed JL-VSO-Ga₂O₃-FinFET device exhibits better performance compared to the regular silicon-based Fin FET device where the cutoff frequency is improved by 9.56%, and the transconductance is improved by 13.28%, and C_gd is reduced, is dropped by 20.96% where this device is highly recommended for the Analog and RF applications.

DOI：

https://doi.org/10.1007/s00542-024-05784-y